Digital VLSI Design and Simulation with Verilog
Digital VLSI Design and Simulation with Verilog Login for the JSON version of this page.
- Title
- Digital VLSI Design and Simulation with Verilog
- ISBN-10
- 1-119-77809-3
- ISBN-13
- 978-1-119-77809-7
- Author(s)
- Govind S. Patel, Sobhit Saxena, Suman Lata Tripathi, Sanjeet K. Sinha
- Publisher
- Wiley & Sons, Incorporated, John
- Published
- 2022
- Format
- Subtitle
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- Series
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- Imprint
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- Pages
- 803
- Language
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- Subjects
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- Genre
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Description
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Metadata
- EAN
- 9781119778097
- ASIN
- 1119778093
- Prefix
- 978
- Group
- 1
- Group Name
- English language
- Group Identifier
- 978-1
- Registrant
- 119
- Publication
- 77809
- Check Digit
- 7
- Formatted
- 978-1-119-77809-7