Design of Cost Efficient Network on Chip Architectures

Design of Cost Efficient Network on Chip Architectures Login for the JSON version of this page.

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Title: Design of Cost Efficient Network on Chip Architectures
ISBN-10: 1-4200-4471-0
ISBN-13: 978-1-4200-4471-3
Author(s): Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Miltos D. Grammatikakis, Marcello Coppola
Publisher: CRC, Taylor & Francis
Published: 2008
Format: Hardcover
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Pages: 329
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Description

Metadata

EAN: 9781420044713
ASIN: 1420044710
Prefix: 978
Group: 1
Group Name: English language
Group Identifier: 978-1
Registrant: 4200
Publication: 4471
Check Digit: 3
Formatted: 978-1-4200-4471-3

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