Hierarchical Modeling for VLSI Circuit Testing

Hierarchical Modeling for VLSI Circuit Testing Login for the JSON version of this page.

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Title: Hierarchical Modeling for VLSI Circuit Testing
ISBN-10: 1-4613-1528-X
ISBN-13: 978-1-4613-1528-5
Author(s): John P Hayes, Debashis Bhattacharya
Publisher: Island Press
Published: 1989
Format
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Pages: 484
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Description

Metadata

EAN: 9781461315285
ASIN: 146131528X
Prefix: 978
Group: 1
Group Name: English language
Group Identifier: 978-1
Registrant: 4613
Publication: 1528
Check Digit: 5
Formatted: 978-1-4613-1528-5

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