Designing 2D and 3D Network on Chip Architectures

Designing 2D and 3D Network on Chip Architectures Login for the JSON version of this page.

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Title: Designing 2D and 3D Network on Chip Architectures
ISBN-10: 1-4614-4275-3
ISBN-13: 978-1-4614-4275-2
Author(s): Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris
Publisher: Springer
Published
Format: paperback
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Pages: 176
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Description

Metadata

EAN: 9781461442752
ASIN: 1461442753
Prefix: 978
Group: 1
Group Name: English language
Group Identifier: 978-1
Registrant: 4614
Publication: 4275
Check Digit: 2
Formatted: 978-1-4614-4275-2

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