High Level Synthesis of ASICs under Timing and Synchronization Constraints

High Level Synthesis of ASICs under Timing and Synchronization Constraints Login for the JSON version of this page.

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Title: High Level Synthesis of ASICs under Timing and Synchronization Constraints
ISBN-10: 1-4757-2117-X
ISBN-13: 978-1-4757-2117-1
Author(s): David C. Ku
Publisher: Springer US
Published: 1992
Format: [electronic resource] /
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Pages: 766
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Description

Metadata

EAN: 9781475721171
ASIN: 147572117X
Prefix: 978
Group: 1
Group Name: English language
Group Identifier: 978-1
Registrant: 4757
Publication: 2117
Check Digit: 1
Formatted: 978-1-4757-2117-1

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